There are many types of different integrated circuit (IC) packages that cater to different applications. Some of the more common IC packages include flip chip and wire-bond ball grid array (BGA) packages. IC packages typically include an IC chip and other components like on-package de-coupling (OPD) capacitors placed on a substrate. The bottom surface of the substrate of a BGA package is usually filled with solder balls. These solder balls on the bottom of the IC package connect the IC package to a printed circuit board (PCB).
Signals from the IC chip are transmitted to the PCB through the substrate in the IC package and the solder balls on the bottom of the IC package. The substrate of the IC package generally contains a large number of horizontal and vertical transmission lines that connect the IC chip to the solder balls on the underside of the IC package. The substrate of the IC package is usually a multi-layer substrate that includes multiple power and ground layers and signal traces separated by dielectric layers.
Generally, the substrate layers are formed by having multiple dielectric and metal layers stacked alternately. Each of the metal layers may be a ground layer, a power layer or a signal layer. The metal layers are stacked such that the power layer and the signal layer will each have two ground layers, i.e., top and bottom, as reference layers. Signals from the IC chip are transmitted through the traces on the metal layers of the substrate to the solder balls at the bottom of the package before being routed out on the PCB.
Several factors affect signal integrity in an IC package, such as, impedance matching, crosstalk noise and return loss and insertion loss of the transmission paths. Single-ended signal traces need to have 50 Ohms characteristic impedance while differential signal traces need to have 100 Ohms characteristic impedance. For IC packages with a very high number of I/Os, dielectric layers of the IC packages need to be sufficiently thin to support narrow transmission traces in order to maintain the required impedance and to accommodate the high I/O density. For example, for a typical substrate with a dielectric thickness of 35 μm per layer, the trace width that is needed for the transmission traces to achieve a differential impedance of 100 Ohms is less than 20 μm. A thinner dielectric layer would require even narrower traces for better impedance matching. A thinner dielectric layer with narrow traces may also help reduce crosstalk between the traces. However, in most cases, there is a limit on how narrow the trace widths on the substrate layers can be and the narrowest trace width that can be achieved is generally more than 20 μm due to manufacturing constraints.
Therefore, it is desirable to have accurate impedance control without requiring a much narrower trace width. It is also desirable to be able to increase layer thickness as required without increasing crosstalk noise. It is within this context that the invention arises.